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Documentation

PCB setup and design checks

Use this guide to move from electrical design into physical implementation and investigate check findings.

Topics
4
Full sequence
82 min
Format
Task reference

Guide map

Synchronize the schematic and PCB, inspect board setup, and run ERC and DRC.

Diagram of a task guide organized into preparation, procedure, checks, and troubleshooting
Each topic summarizes the key actions, completion checks, and first recovery step.

Topics

Work through only the parts your task requires.

  1. 01

    Synchronize schematic and PCB

    Use Design Sync: Push to PCB to review exact component, footprint, and net changes before a controlled apply.

    Key actions

    Save and identify the source; Review mappings; Preview the change set; Apply approved changes.

    Complete when

    Source revision known Mappings reviewed

  2. 02

    Inspect board setup

    Measure the board outline and inspect layers, origins, footprints, zones, and rule sources before layout work.

    Key actions

    Check and measure the outline; Review the layer plan; Inspect coordinate origins; Sample critical footprints.

    Complete when

    Outline checked Dimensions checked

  3. 03

    Run and triage ERC

    Run electrical checks on a named saved state, classify every finding, correct confirmed issues, and prove the change with an identical rerun.

    Key actions

    Record the baseline; Run ERC; Classify findings; Correct one class.

    Complete when

    Revision recorded Initial count saved

  4. 04

    Run and triage DRC

    Run physical checks on a saved board and rule set, inspect each geometry finding, and prove corrections with the same rerun.

    Key actions

    Record state and rules; Run DRC; Inspect in context; Correct confirmed defects.

    Complete when

    Revision recorded Rules recorded

When something does not match

Stop at the layer that actually failed.

Preserve the original state, correct the source or configuration, and repeat the affected check. Do not use a clean-looking screen as a substitute for the expected engineering result.
Synchronize schematic and PCB

The synchronization action is unavailable
Try: Confirm both a schematic and PCB exist in the same editable project and that the intended source state is saved.

Inspect board setup

Outline appears closed but output fails
Try: Inspect for overlapping, duplicate, reversed, zero-length, or near-coincident board-edge segments at each join.

Run and triage ERC

Run ERC is unavailable
Try: Confirm a schematic is open and the project is editable. Record the role and active sheet instead of assuming the check ran.

Run and triage DRC

Run DRC is unavailable
Try: Confirm a PCB is open, the board has been saved, and the current role permits the check. Record the active file instead of assuming a result.